OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 416

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
Table 384. ICSR bit assignments
Bits
[31]
[30:29]
[28]
[27]
[26]
[25]
[24:23]
Name
NMIPENDSET
-
PENDSVSET
PENDSVCLR
PENDSTSET
PENDSTCLR
-
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 March 2011
Type
RW
-
RW
WO
RW
WO
-
Function
NMI set-pending bit.
Write:
0 = no effect
1 = changes NMI exception state to pending.
Read:
0 = NMI exception is not pending
1 = NMI exception is pending.
Because NMI is the highest-priority exception, normally
the processor enters the NMI exception handler as soon
as it detects a write of 1 to this bit. Entering the handler
then clears this bit to 0. This means a read of this bit by
the NMI exception handler returns 1 only if the NMI
signal is reasserted while the processor is executing that
handler.
Reserved.
PendSV set-pending bit.
Write:
0 = no effect
1 = changes PendSV exception state to pending.
Read:
0 = PendSV exception is not pending
1 = PendSV exception is pending.
Writing 1 to this bit is the only way to set the PendSV
exception state to pending.
PendSV clear-pending bit.
Write:
0 = no effect
1 = removes the pending state from the PendSV
exception.
SysTick exception set-pending bit.
Write:
0 = no effect
1 = changes SysTick exception state to pending.
Read:
0 = SysTick exception is not pending
1 = SysTick exception is pending.
SysTick exception clear-pending bit.
Write:
0 = no effect
1 = removes the pending state from the SysTick
exception.
This bit is WO. On a register read its value is Unknown.
Reserved.
Chapter 25: LPC122x Appendix ARM Cortex-M0
UM10441
© NXP B.V. 2011. All rights reserved.
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