OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 417

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
25.5.3.4 Application Interrupt and Reset Control Register
Table 384. ICSR bit assignments
[1]
When you write to the ICSR, the effect is Unpredictable if you:
The AIRCR provides endian status for data accesses and reset control of the system. See
the register summary in
To write to this register, you must write 0x05FA to the VECTKEY field, otherwise the
processor ignores the write.
The bit assignments are:
Table 385. AIRCR bit assignments
Bits
[22]
[21:18]
[17:12]
[11:6]
[5:0]
Bits
[31:16]
[15]
[14:3]
•
•
This is the same value as IPSR bits[5:0], see
write 1 to the PENDSVSET bit and write 1 to the PENDSVCLR bit
write 1 to the PENDSTSET bit and write 1 to the PENDSTCLR bit.
Name
ISRPENDING
-
VECTPENDING
-
VECTACTIVE
Name
Read: Reserved
Write: VECTKEY
ENDIANESS
-
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 March 2011
[1]
Table 25–382
RO
-
Type
RO
-
RO
Type
RW
RO
-
Function
Interrupt pending flag, excluding NMI and Faults:
0 = interrupt not pending
1 = interrupt pending.
Reserved.
Indicates the exception number of the highest priority
pending enabled exception:
0 = no pending exceptions
Nonzero = the exception number of the highest priority
pending enabled exception.
Reserved.
Contains the active exception number:
0 = Thread mode
Nonzero = The exception number
active exception.
Remark: Subtract 16 from this value to obtain the
CMSIS IRQ number that identifies the corresponding bit
in the Interrupt Clear-Enable, Set-Enable,
Clear-Pending, Set-pending, and Priority Register, see
Table
Chapter 25: LPC122x Appendix ARM Cortex-M0
and
Function
Register key:
Reads as Unknown
On writes, write 0x05FA to VECTKEY, otherwise the
write is ignored.
Data endianness implemented:
0 = Little-endian
1 = Big-endian.
Reserved
Table
25–356.
Table 25–385
25–356.
for its attributes.
[1]
UM10441
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