OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 69

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OM13008,598

Manufacturer Part Number
OM13008,598
Description
BOARD LPC XPRESSO LPC122X
Manufacturer
NXP Semiconductors
Series
LPCXpressor
Datasheets

Specifications of OM13008,598

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-6642
OM13008
NXP Semiconductors
UM10441
User manual
6.4.7 PIO0_24 register
Table 67.
Table 68.
Bit
5
6
7
8
9
10
12:11
15:13
31:16
Bit
2:0
3
Symbol
-
INV
ADMODE
-
DRV
OD
S_MODE
CLK_DIV
-
Symbol
FUNC
-
PIO0_23 register (PIO0_23, address 0x4004 4018) bit description
PIO0_24 register (PIO0_24, address 0x4004 401C) bit description
All information provided in this document is subject to legal disclaimers.
Value
0
1
0
1
0
1
0
1
0x0
0x1
0x2
0x3
0x0
0x1
0x2
0x3
0x4
0x5
0x6
-
Value
0x0
0x1
0x2
0x3
0x4
Rev. 1.1 — 10 March 2011
Description
Reserved.
Invert input
Input not inverted.
Input inverted.
Analog/Digital mode
Analog mode enabled.
Digital mode enabled.
Reserved.
Drive current mode (Normal-drive pin).
High mode current selected.
Low mode current selected.
Open-drain mode.
Open-drain mode disabled.
Open-drain mode enabled.
Sample mode
Bypass input filter.
Input pulses shorter than one filter clock are rejected.
Input pulses shorter than two filter clocks are rejected.
Input pulses shorter than three filter clocks are rejected.
Select peripheral clock divider for input filter sampling clock.
IOCONFIGCLKDIV0.
IOCONFIGCLKDIV1.
IOCONFIGCLKDIV2.
IOCONFIGCLKDIV3.
IOCONFIGCLKDIV4.
IOCONFIGCLKDIV5.
IOCONFIGCLKDIV6.
Reserved.
Description
Selects pin function.
Selects function PIO0_24.
Reserved. Do not use.
Select function ACMP1_I1.
Select function CT32B1_CAP1.
Select function CT32B1_MAT1.
Reserved
Chapter 6: LPC122x I/O configuration (IOCONFIG)
UM10441
© NXP B.V. 2011. All rights reserved.
69 of 442
Reset
value
0
0
1
0
0
0
00
000
0
Reset
value
000
0

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