OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 294

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
18.7.4 Interrupts
18.7.5 Comparator outputs
The interrupt can be selected to be edge or level style. If level is selected, the interrupt
leaving this block is synchronized first to the peripheral clock domain to prevent an
asynchronous interrupt path crashing the CPU. If edge level interrupts are selected, a
choice of active high, active low or active both edges can be selected. Interrupts are
cleared by the CPU writing CLINT high.
The combined ORed interrupts of comparator0 and comparator1 are routed to the NVIC
for ISR purposes using the CPU.
The two comparator level outputs are routed to external pins. The level and edge
comparator outputs are also internally connected to the capture inputs of the two 16-bit
timers. The outputs can be selected in synchronous or asynchronous modes (see
Table
In addition, the status of each comparator output can be observed through the comparator
status register bits
The level and edge outputs of each comparator are routed to the two 16-bit timers
internally as listed below:
This feature allows tick-counting on comparator output transitions on either the positive
edge, the negative edge, or both edges (depending on the comparator register
configuration), if the edge capture is chosen. If the timer level capture is chosen, the
counter can run while the comparator output is in a given state.
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For internal connection to the timer capture inputs, synchronous or asynchronous
modes can be selected.
When the asynchronous outputs are routed to external pins, the comparators can be
used without clocking PCLK to save power once the device is configured.
When the comparator is configured to wake up the part from Deep-sleep mode, the
asynchronous mode must be selected.
16-bit timer 0 (CT16B0):
– capture input 3: comparator 0 edge
– capture input 2: comparator 0 level
16-bit timer 1 (CT16B1):
– capture input 3: comparator 1 edge
– capture input 2: comparator 1 level
274):
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 March 2011
Chapter 18: LPC122x Comparator
UM10441
© NXP B.V. 2011. All rights reserved.
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