OM13008,598 NXP Semiconductors, OM13008,598 Datasheet - Page 411

• Manufacturer Part Number: OM13008,598
• Description: BOARD LPC XPRESSO LPC122X
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor

Specifications of OM13008,598

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-6642; OM13008

NXP Semiconductors
UM10441
User manual
25.5.2.4 Interrupt Set-pending Register
25.5.2.5 Interrupt Clear-pending Register
Table 377. ICER bit assignments
The ISPR forces interrupts into the pending state, and shows which interrupts are
pending. See the register summary in
The bit assignments are:
Table 378. ISPR bit assignments
Remark: Writing 1 to the ISPR bit corresponding to:
The ICPR removes the pending state from interrupts, and shows which interrupts are
pending. See the register summary in
The bit assignments are:
Table 379. ICPR bit assignments
Remark: Writing 1 to an ICPR bit does not affect the active state of the corresponding
interrupt.
Bits
[31:0]
Bits
[31:0]
Bits
[31:0]
•
•
an interrupt that is pending has no effect
a disabled interrupt sets the state of that interrupt to pending.
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Name
CLRENA
Name
SETPEND
Name
CLRPEND
Rev. 1.1 — 10 March 2011
Function
Interrupt clear-enable bits.
Write:
0 = no effect
1 = disable interrupt.
Read:
0 = interrupt disabled
1 = interrupt enabled.
Function
Interrupt set-pending bits.
Write:
0 = no effect
1 = changes interrupt state to pending.
Read:
0 = interrupt is not pending
1 = interrupt is pending.
Function
Interrupt clear-pending bits.
Write:
0 = no effect
1 = removes pending state an interrupt.
Read:
0 = interrupt is not pending
1 = interrupt is pending.
Table 25–374
Table 25–374
Chapter 25: LPC122x Appendix ARM Cortex-M0
for the register attributes.
for the register attributes.
UM10441
© NXP B.V. 2011. All rights reserved.
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