F84045 Asiliant Technologies, F84045 Datasheet - Page 130

• Manufacturer Part Number: F84045
• Manufacturer: Asiliant Technologies

Specifications of F84045

• Lead Free Status / Rohs Status: Not Compliant

5.14.3. SMI Timing Modes
The 4041 has two timing modes for SMI#: Intel and Cyrix.
In Intel mode, SMI# is always an output, and is the OR of the sources.
In Cyrix mode, it is an I/O pin. The Cyrix CPU begins driving SMI# low after detecting it low, then drives it back high
again at the end of the SMM routine. The 4041 algorithm in Cyrix mode is:
5.14.4. Activity Monitor Timers
There are two activity monitor timers. Each is an 8 bit counter which is restarted by the occurrence of any selected
event. EventA restarts TimerA, while EventB restarts TimerB.
hardware function or cause an SMI. It will then automatically restart at the programmed value. It will perform its
function (generate an SMI or change the CPU clock) each time it times out.
TimerA is the main activity timer, used to go into "Green" mode. TimerB has several potential uses. One is for a
shorter period time-out for going in and out of Stop Clock mode between IRQ0 interrupts. Another is to make a
periodic SMI timer.
Revision 1.0
Table 5.33: SMM Status and Enable Registers
SMI Enable B
SMI enable A global enable
SMI status A
SMI status B
Internal -SMI Request
4041 -SMI driver
Cyrix -SMI driver
Function
Table 5.34: Activity Timer Selectable Functions
SMI# result
TimerA
TimerB
Timer
Normally drive SMI# high.
To signal an SMI, drive it low for 4 clock cycles, then float it.
On the clock edge where it is detected high, begin driving it high.
It may be driven back low again in the following clock cycle.
2/10/95
next register
SMI Mode
D7
-
(high)
Detect short term inactivity
Detect long term inactivity Switch to slow clock mode
or Periodic SMI Timer
(Floated)
D6
-
-
-
-
Purpose
Figure 5.18: Cyrix SMI# Timing
Subject to change without notice
Halt
Halt
D5
(Low)
-
-
I/O Restart
I/O Restart
129
D4
-
-
Stop the CPU clock
Hardware Function
(Low)
When the timer times out, it will either perform a
External1
External1
WakeB
WakeB
(Floated)
D3
External0
External0
WakeA
WakeA
D2
(high)
Second -SMI source keeps it low
Software Function
Generate an SMI
Generate an SMI
CPU restart Software smi
CPU restart Software smi
TimerB
TimerB
(high)
D1
(Floated)
Preliminary
Functional Description
for next SMI
(Low)
TimerA
TimerA
D0
CS4041