F84045 Asiliant Technologies, F84045 Datasheet - Page 9

• Manufacturer Part Number: F84045
• Manufacturer: Asiliant Technologies

Specifications of F84045

• Lead Free Status / Rohs Status: Not Compliant

Figure 1
Figure 2.1
Figure 2.2
Figure 5.1
Figure 5.2
Figure 5.3
Figure 5.4
Figure 5.5
Figure 5.6
Figure 5.7
Figure 5.8
Figure 5.9
Figure 5.10
Figure 5.11
Figure 5.12
Figure 5.13
Figure 5.14
Figure 5.15
Figure 5.16
Figure 5.17
Figure 5.18
Figure 5.19
Figure 6.1
Figure 6.2
Figure 6.3
Figure 6.4
Figure 6.5
Figure 7.1
Figure 7.2
Figure 7.3
Figure 7.4
Figure 7.5
Figure 8.1
Figure 8.2
Revision 1.0
System Block Diagram ................................ ................................ ................................ ............................ 1
84041 Pinout ................................ ................................ ................................ ................................ .......... 13
84045 Pinout ................................ ................................ ................................ ................................ .......... 14
L1 Write Back Cache Snoop ................................ ................................ ................................ .................. 89
Cache Data SRAM Connections ................................ ................................ ................................ ............ 92
Cache RAM Low Power Option Connections ................................ ................................ ....................... 93
Cache Tag RAM Connections ................................ ................................ ................................ ................ 93
L2 Cache Read Hit ................................ ................................ ................................ ................................ .98
L2 Cache Read Miss ................................ ................................ ................................ .............................. 99
L2 Cache Read Miss, -2-2-2 Cache Writes ................................ ................................ .......................... 100
L2 Cache Write Back ................................ ................................ ................................ ........................... 100
L2 Cache Write Hit ................................ ................................ ................................ .............................. 101
L1 Cache Write Back ................................ ................................ ................................ ........................... 101
Burst Read Timing Modes ................................ ................................ ................................ ................... 111
Burst Write Timing Modes ................................ ................................ ................................ .................. 112
RAS to CAS Timing Modes ................................ ................................ ................................ ................ 112
RAS Precharge Timing Modes ................................ ................................ ................................ ............. 112
Refresh cycle ................................ ................................ ................................ ................................ ........ 113
Basic Fast IDE Timing. ................................ ................................ ................................ ........................ 120
Fast IDE Programmable Parameters ................................ ................................ ................................ .....120
Cyrix SMI# Timing ................................ ................................ ................................ .............................. 129
I/O Restart Timing ................................ ................................ ................................ ............................... 134
WBACK# Timing ................................ ................................ ................................ ................................ 149
Hidden Refresh Timing ................................ ................................ ................................ ........................ 151
DMA Cycle Timing ................................ ................................ ................................ ............................. 154
Interrupt Controller Internal Connections ................................ ................................ ............................ 155
8254 Timer Internal Connections ................................ ................................ ................................ ......... 156
Timing Waveform ................................ ................................ ................................ ................................ 169
Timing Waveform ................................ ................................ ................................ ................................ 169
Timing Waveform ................................ ................................ ................................ ................................ 169
Timing Waveform ................................ ................................ ................................ ................................ 169
Timing Waveform ................................ ................................ ................................ ................................ 169
84041 Packaging Dimensions ................................ ................................ ................................ .............. 170
84045 Packaging Dimensions ................................ ................................ ................................ .............. 171
2/10/95
Subject to change without notice
List of Figures
7
Preliminary
List of Figures
CS4041