F84045 Asiliant Technologies, F84045 Datasheet - Page 139

• Manufacturer Part Number: F84045
• Manufacturer: Asiliant Technologies

Specifications of F84045

• Lead Free Status / Rohs Status: Not Compliant

(20h) Read Command Byte. The Command Byte is placed into the Controller Output Buffer for reading by the host
CPU. For bit definitions, see 60h command below. (The "Command Byte" is an internal byte separate from the host
CPU commands written to port 64h.)
(21-2Fh) Read RAM. A one-byte simulated "RAM" is provided for software compatibility. Any "Read RAM"
command causes this one byte to be placed into the Controller Output Buffer for reading by the host CPU.
(60h) Write Command Byte. The next byte written to port 60h is placed into the Command Byte. On reset, the byte
is set to 70h. Scan code conversion is always enabled. Bit definitions:
(61-6Fh) Write RAM. The internal keyboard/mouse controller contains a one-byte register that simulates the RAM
found in the 8042. A single byte is sufficient for PS/2 compatibility. Any "Write RAM" command writes this one
byte.
(A7h) Disable Mouse. This host command sets bit 5 in the Command Byte, causing the mouse clock to be driven
continuously low to disable the mouse interface.
(A8h) Enable Mouse. This host command clears bit 5 in the Command Byte, allowing the mouse clock to return to
the high state and be pulsed by the mouse if the mouse has new data to transmit.
(A9h) Mouse Interface Test. For PS/2 compatibility, a 00h test result is placed in the Controller Output Buffer for
reading by the host CPU. No actual test of the mouse interface is performed.
(AAh) Self Test. For PS/2 compatibility, a 55h test result is placed in the Controller Output Buffer for reading by the
host CPU. No actual self-test is performed beyond issuing the 55h result.
(ABh) Keyboard Interface Test. For PS/2 compatibility, a 00h test result is placed in the Controller Output Buffer
for reading by the host CPU. No actual test of the keyboard interface is performed.
(ADh) Disable Keyboard. This host command sets bit 4 in the Command Byte, causing the keyboard clock to be
driven continuously low to disable the keyboard interface.
(AEh) Enable Keyboard. This host command clears bit 4 in the keyboard/mouse command byte, allowing the
keyboard clock to return to the high state and be driven by the keyboard if the keyboard has new data to transmit.
Revision 1.0
C0h
D0h
D1h
D4h
E0h
F0-FFh *Pulse Output Port
* D4h and F0-FEh may not finish executing in the same ISA cycle as issued.
*Transmit to Mouse
Read Input Port
Read Output Port
Write Output Port
Read Test Inputs (keyboard and mouse clocks)
7
6
5
4
3
2
1
0
2/10/95
Reserved, write as 0.
Reserved
Disable Mouse
Disable Keyboard
Inhibit Override (ignore KBINH# input)
System Flag
Enable Mouse Interrupt
Enable Keyboard Interrupt
Subject to change without notice
138
Preliminary
Functional Description
CS4041