F84045 Asiliant Technologies, F84045 Datasheet - Page 5

• Manufacturer Part Number: F84045
• Manufacturer: Asiliant Technologies

Specifications of F84045

• Lead Free Status / Rohs Status: Not Compliant

1. Introduction .................................................................................................................................11
2. Pinouts ..........................................................................................................................................13
3. Registers .......................................................................................................................................29
4. System Level Functions and Cross References .........................................................................69
Revision 1.0
1.1. CPUs Supported ................................ ................................ ................................ ................................ ......... 11
1.2. External Chips ................................ ................................ ................................ ................................ ............. 11
2.1. Pin Descriptions ................................ ................................ ................................ ................................ ......... 15
2.2. 84041 Pin Overview ................................ ................................ ................................ ................................ ..15
2.3. 84045 Pin Overview ................................ ................................ ................................ ................................ ..17
2.4. 84041 Pin Descriptions ................................ ................................ ................................ .............................. 18
2.5. 84045 Pin Descriptions ................................ ................................ ................................ .............................. 24
3.1. I/O Ports and Configuration Registers ................................ ................................ ................................ .......29
3.2. 84041 I/O Port Addresses ................................ ................................ ................................ .......................... 32
3.3. 84041 Index Configuration Registers ................................ ................................ ................................ ........ 35
3.4. 84045 I/O Port Addresses ................................ ................................ ................................ .......................... 60
3.5. 84045 Configuration Registers ................................ ................................ ................................ ................. 63
4.1. Clocks ................................ ................................ ................................ ................................ ........................ 69
4.2. Reset and GATEA20 ................................ ................................ ................................ ................................ ..69
4.3. Arbitration ................................ ................................ ................................ ................................ .................. 70
4.4. Refresh ................................ ................................ ................................ ................................ ....................... 70
4.5. Co-processor Logic ................................ ................................ ................................ ................................ ....71
4.6. ISA Bus and ISA Features ................................ ................................ ................................ ......................... 71
4.7. Local Bus Support ................................ ................................ ................................ ................................ ......71
4.8. DRAM controller ................................ ................................ ................................ ................................ .......71
4.9. Cache Controller ................................ ................................ ................................ ................................ ........ 72
4.10. Keyboard/Mouse Controller ................................ ................................ ................................ ..................... 73
4.11. IDE Controller ................................ ................................ ................................ ................................ .......... 73
4.12. CPUs Containing Writeback Caches ................................ ................................ ................................ ........ 73
4.3.1 Control Link ................................ ................................ ................................ ............................... 70
2/10/95
Subject to change without notice
Table of Contents
3
Preliminary
Table of Contents
CS4041