F84045 Asiliant Technologies, F84045 Datasheet - Page 159

• Manufacturer Part Number: F84045
• Manufacturer: Asiliant Technologies

Specifications of F84045

• Lead Free Status / Rohs Status: Not Compliant

The PSRSTB pin of the 4045 connects to the internal PS signal of the RTC. This is used to detect loss of battery
power. It is externally connected to an RC circuit. When SIPC power is lost, then restored, the RC circuit causes a low
to high transition on PSRSTB after power is reapplied. This resets bit 7 of Status Register D (address offset 0D) in the
RTC to a 0 (Valid RAM and Time, "VRT"), indicating that the date, time, and/or CMOS RAM contents may be invalid
due to loss of both system and battery power.
The 4045 adds two features to the Real Time Clock:
6.9.4.1. Password Protection
The RTC Password protect allows software, usually contained in the ROM BIOS (for maximum effectiveness) to lock
out 8 bytes of the CMOS RAM, preventing reads or writes to it. This allows a password to be stored there, which the
user must type to enable the computer. At power up, the password in the RTC can be read or written. After successful
log-on by the user, the password is protected, preventing someone from reading and/or changing it from DEBUG (or
another program). Before it is protected, the user, after successful log-on, has the option to change or disable the
password.
When Port 92 bit 3 is written to a 1, a flip-flop is set in the 4045 which disables reads and writes to locations 38
through 3F of the CMOS. Port 92 bit 3 cannot be written back to a 0. This feature can be disabled through a config
register, but once the actual protection has been done it cannot be disabled by the config bit (there are no security
loopholes). Only a system reset will allow accesses again.
6.9.4.2. RTC IRQ output
When PWRGOOD is low, IGNNE# becomes the open collector RTC interrupt output. If this feature is used, a pull-up
should be provided on the IGNNE# pin. The pin floats until an RTC interrupt occurs, at which time the SIPC drives
the pin low. This feature is always enabled. It can be used by external circuitry, if desired, to power up the system as a
result of an RTC alarm. It will function at the reduced RTC battery voltage.
Revision 1.0
Password Protection
Alarm Output during power down.
2/10/95
Table 6.2 Real Time Clock/CMOS RAM addresses
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E-3F
40-7F
Byte
Subject to change without notice
Seconds
Seconds alarm
Minutes
Minutes alarm
Hours
Hours alarm
Day of week
Date of month
Month
Year
Status Register A
Status Register B
Status Register C
Status Register D
Used by the standard AT BIOS
Used by the chipset specific
BIOS
158
Function
Preliminary
Functional Description
CS4041