RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 110

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

5.0 Reassembly Coprocessor
5.2 Reassembly Functional Description
5-6
5.2.2.3 Operation
5.2.2.2 Setup
At system initialization, the user configures the RS8234 to comply with either the
8-bit UNI VPI field or the 12-bit NNI VPI field, by setting the RSM_CTRL0
(VPI_MASK) bit to a logic high for UNI operation or a logic low for NNI
operation. This configuration determines whether the RS8234 will treat the upper
nibble of the first header octet of each received cell as the GFC field (in the UNI
VPI definition), or as an extension of the VPI address. This gives an address
range for VPIs of either 256 entries (for UNI) or 4096 entries (for NNI). This sets
the VPI Index table size and dictates the number of VCI Index tables to be
allocated.
as described in the section above, by setting EN_PROG_BLK_SZ(RSM_CTRL1)
to a logic high.
VCI addresses to be processed, in order to reduce the memory size of the lookup
structures being accessed. VPIs are limited by VP_EN; and VCIs are limited by
VCI_RANGE in the VPI Index table entry, as well as BLK_EN in the VCI Index
table entry when EN_PROG_BLK_SZ is enabled.
Index table entries to blocks in the reassembly VCC Table.
Virtual Circuits (SVCs), can be dynamically allocated with simple “on-the-fly”
index updates.
Upon reception of a cell, the reassembly coprocessor uses the VPI field as an
index into the VPI Index table, the base address of which is located at
RSM_TBASE(RSM_ITB) x 0x80. The maximum allowed VPI value for UNI
header operation is 255, and the maximum allowed VPI value for NNI operation
is 4,095, controlled by the RSM_CTRL0(VPI_MASK) field. If the VPI_MASK
bit is a logic high (indicating UNI header operation), the four most significant bits
of the ATM header are ANDed with “0000”. The RSM coprocessor uses the VPI
value to read the VPI Index table entry.
maximum allowed value of VCI[15:x] values for that VPI, and thus sets the
usable size of the VCI Index table for that VPI. If the value of VCI[15:x] of the
received VCI field in the ATM header is greater than the VCI_RANGE field in
the VPI Index table entry, or VP_EN is a logic low, the reassembly coprocessor
discards the cell and increments the CELL_DSC_CNT counter.
The RS8234 then reads the appropriate entry in the VCI Index table. The address
of the VCI Index Table entry is derived as follows:
block of 64 reassembly VCC State Table entries (or from 1– 64 VCC State Table
entries if EN_PROG_BLK_SZ is enabled), offset from the base address of the
reassembly VCC Table. The VCC_INDEX value is derived by concatenating the
VCC_BLOCK_INDEX value with the VCI[x-1:0] bits from the received cell
header. Thus, VCI[x-1:0] from the received header points to the reassembly VCC
State Table entry for that VCC.
The user can also enable the programmable block size for VCC Table entries
At system initialization, the user can also limit the valid range of both VPI and
VPI/VCI address pairs can now be preallocated in groups by mapping VCI
Once the reassembly process has been initiated, additional channels, Switched
The VCI_RANGE field in the VPI Index table entry is used to set the
The VCI_IT_PNTR indicates the base address of the VPI’s VCI Index table.
The VCC_BLOCK_INDEX in the VCI Index table entry selects a contiguous
Mindspeed Technologies
VCI_IT_PNTR x 4 + VCI[15:x] x 4
VCC_INDEX = VCC_BLOCK_INDEX + VCI[x-1:0]
ATM ServiceSAR Plus with xBR Traffic Management
™
28234-DSH-001-B
RS8234