RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 152

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

5.0 Reassembly Coprocessor
5.7 Reassembly Control and Status Structures
5.7.4 Free Buffer Queues
Table 5-21. Free Buffer Queue Base Table Entry Descriptions
5-48
Table 5-20. Free Buffer Queue Base Table Entry Format
UPDATE
EMPT
BFR_LOCAL
BD_LOCAL
READ
LENGTH
FORWARD
READ_UD_PNTR
Word
0
1
2
3
Field Name
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Read Index Pointer Update Interval counter.
Free buffer queue Empty flag. Used to indicate that an appropriate status entry has been written to
indicate the empty condition.
If logic high, cell buffers located in SAR shared memory, otherwise in host memory.
If logic high, buffer descriptor and READ_UD word are located in SAR shared memory, otherwise in
host memory.
Current READ index pointer.
Length in bytes of buffers in queue. Even though LENGTH is in bytes, the user must set the length to a
mod-32 bit boundary.
Current Forward Processing Read index pointer (firewalling).
Word address in user memory to write READ pointer every UPDATE interval.
The host initializes the free buffer queues in SAR shared memory, and during
reassembly processing submits data buffers for reassembly to the free buffer
queues.
Table 5-20
entries.
LENGTH
The free buffer queue base table is located in RS8234 internal memory.
Mindspeed Technologies
and
UPDATE
Table 5-21
READ_UD_PNTR
Reserved
describe the format of the free buffer queue base table
Description/Function
ATM ServiceSAR Plus with xBR Traffic Management
Rsvd
Rsvd
™
FORWARD
READ
28234-DSH-001-B
RS8234
Rsvd