RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 276

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

12.0 ATM Utopia Interface
12.5 UTOPIA Mode Octet Handshake Timing
Figure 12-3. Receive Timing in UTOPIA Mode with Octet Handshake
12-6
RXD/RXPAR
NOTE(S):
(1)
RXCLAV
RXSOC
FRCTRL
RxEN* goes inactive only if there is no room for another octet in the receive FIFO buffer.
RXEN*
H1
H2
12.5 UTOPIA Mode Octet Handshake Timing
If low, the UTOPIA_MODE bit in the CONFIG0 Register selects octet-level
handshaking. Received data is latched from the RXD[7:0] and RXPAR lines on
the rising edge of FRCTRL after RXEN* is sampled active (see
8-bit odd parity computed over the RXD[7:0] lines is compared to the RXPAR
input. If in error, FR_PAR_ERR in the HOST_ISTAT0/LP_ISTAT0 registers is
set. No data is discarded upon a parity error unless the RSM_PHALT bit in the
RSM_CTRL Register is set to a logic high. If so, the reassembly coprocessor halts
upon a parity error.
physical layer FIFO empty signal. When it is active, no data is present in the
physical receive FIFO. The physical layer device sets RXCLAV inactive when it
has an octet to transfer. The RS8234 sets RXEN* to a logic low if it can accept an
octet in the next clock cycle. The FR_RMODE bit in the CONFIG0 Register
should be set to a logic low in this mode.
TXEN* is asserted. TXEN* is only asserted when there is data in the RS8234
transmit FIFO. Simultaneously, the 8-bit odd parity computed over the TXD[7:0]
lines is driven on to the TXPAR output. The TXSOC line is driven by the framer
device to indicate start of cell. If the TXCLAV input is asserted by the framer
device, the framer device is full and can accept only one to four more octets. (See
Figure
The RXSOC signals the start of cell to the RS8234. The RXCLAV input is the
Transmit data is driven on TXD[7:0] on the rising edge of FRCTRL when
H3
12-2.)
(1)
Mindspeed Technologies
X
H4
X
ATM ServiceSAR Plus with xBR Traffic Management
H5
™
***
P48
H1
28234-DSH-001-B
Figure
H2
12-3). The
H3
RS8234
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