RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 267
RS8234EBGC
Manufacturer Part Number
RS8234EBGC
Description
RS8234EBGC ATM XBR SAR
Manufacturer
Mindspeed Technologies
Datasheet
1.RS8234EBGC.pdf
(401 pages)
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RS8234
ATM ServiceSAR Plus with xBR Traffic Management
28234-DSH-001-B
11.8 Power Management
Power Management, as a defined class of functions, consists of mechanisms in
software and hardware to minimize system power consumption, manage system
thermal limits, and maximize system battery life. The RS8234 supports Power
Management on the PCI bus according to the PCI Bus Power Management
Interface Specification, Revision 1.0.
savings. The RS8234 device supports the two mandatory power states, D0 and
D3, of the PCI Bus Power Management Interface Specification. D0 is the
maximum powered state (on) and D3 is the minimum powered state (off). When
in the D3 state, SYSCLK is turned off.
space and PCI registers concerned with implementing the Power Management
functions.
bit 2 of the EEPROM (Disable Capability Register), which sets bit 20 of the PCI
Status Register to a logic low. See the PCI Bus Power Management Interface
Specification, Revision 1.0, for specific information on the functions involved in
Power Management.
Power management states are defined as varying, distinct levels of power
Refer to
Power Management is enabled by default. This capability can be disabled via
Mindspeed Technologies
Section 13.7
for the detailed information on the PCI Configuration
™
11.8 Power Management
11.0 PCI Bus Interface
11-7
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