RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 240
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RS8234EBGC
Manufacturer Part Number
RS8234EBGC
Description
RS8234EBGC ATM XBR SAR
Manufacturer
Mindspeed Technologies
Datasheet
1.RS8234EBGC.pdf
(401 pages)
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9.0 Local Memory Interface
9.2 Memory Bank Characteristics
Figure 9-2. 0.5 MB SRAM Bank Utilizing by_8 Devices
Figure 9-3. 1 MB SRAM Bank Utilizing by_16 Devices
9-4
RS8234
LADDR[16:0]
LDATA[31:0]
RAMMODE
MWE[0]*
MWE[1]*
MWE[2]*
MWE[3]*
MCSx*
MWR*
MOE*
D[31:24]
RS8234
LADDR[17:0]
GND
LDATA[31:0]
RAMMODE
MWE[0]*
MWE[1]*
MWE[2]*
MWE[3]*
IC, and to a future second Mindspeed PHY device. This mapping is only valid
when the PROCMODE input pin is pulled high, indicating standalone operation
with no local processor present. Standalone operation is detailed in
When PROCMODE is logic low and the local processor is present, addresses
0x100h through 0xFFFh are available for general use and are mapped to
MCS[0]*.
MCSx*
MWR*
MOE*
The memory map contains space allocated to the RS825x physical interface
/CS
/OE
/WE
A[16:0]
D[7:0]
128 k x 8
SRAM
Mindspeed Technologies
D[31:16]
Pullup
D[23:16]
A[17:0]
D[15:0]
/CS
/OE
/BEL
/BEH
/WE
256 k x 16
/CS
/OE
/WE
A[16:0]
D[7:0]
128 k x 8
SRAM
SRAM
ATM ServiceSAR Plus with xBR Traffic Management
D[15:8]
D[15:0]
™
/CS
/OE
A[16:0]
D[7:0]
/WE
128 k x 8
SRAM
A[17:0]
D[15:0]
/CS
/OE
/WE
/BEL
/BEH
256 k x 16
SRAM
D[7:0]
28234-DSH-001-B
A[16:0]
D[7:0]
/CS
/OE
/WE
128 k x 8
SRAM
Section
RS8234
100074_068
100074_069
10.6.
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