RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 43

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RS8234EBGC

Manufacturer Part Number
RS8234EBGC
Description
RS8234EBGC ATM XBR SAR
Manufacturer
Mindspeed Technologies
Datasheet

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RS8234
ATM ServiceSAR Plus with xBR Traffic Management
2.2.7 Interrupts
28234-DSH-001-B
The RS8234 informs the host of segmentation and reassembly activity by means
of maskable interrupts sent to the host processor, triggered by writes to the
segmentation and reassembly status queues.
interrupts at PDU boundaries (called Message Mode), or at data buffer
boundaries (called Streaming Mode).
can be enabled in order to reduce the interrupt processing load on the host. This
has value when the SAR resides in an environment in which the host is not
dedicated to datacom processing.
The user can configure the SAR to generate these status queue entries and
The RS8234 can also be configured with a status queue interrupt delay, which
Mindspeed Technologies
2.2 High Performance Host Architecture with Buffer Isolation
2.0 Architecture Overview
2-11

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