RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 151

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

Table 5-18. Reassembly Buffer Descriptor Structure
Table 5-19. Reassembly Buffer Descriptor Structure Definitions
RS8234
ATM ServiceSAR Plus with xBR Traffic Management
5.7.3 Reassembly Buffer Descriptor Structure
28234-DSH-001-B
Table 5-17. AAL3/4 Head VCC Table Descriptions (3 of 3)
Word 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
NEXT_PTR
BUFF_PTR
TO_EN
CRC10_ERR
MID_ERR
LI_ERR
SN_ERR
BOM_SSM_ERR
EOM_ERR
0
1
Field Name
Field Name
Enable time-out process of the VCC entry. Must be set to a logic zero.
Number of AAL3/4 cells received with CRC10 error.
Number of AAL3/4 cells received that did not have an active MID as determined by the MID_BITS
and MID0 fields.
Number of AAL3/4 cells received that had an unexpected LI value.
Number of AAL3/4 cells received that had an unexpected SN value.
Number of unexpected AAL3/4 BOM or SSM cells received.
Number of unexpected AAL3/4 EOM cells received.
Reassembly buffer descriptors reside on word-aligned addresses in host memory.
The host controls the allocation and management of reassembly buffer
descriptors.
to an associated reassembly data buffer, in the BUFF_PTR field.
descriptors.
Pointer to the address of the next buffer descriptor.
Pointer to the address of the data cell buffer.
NOTE:
During initialization, in each buffer descriptor entry, the host writes a pointer
Table 5-18
The SAR does not access this word; the user may place it anywhere in the buffer
descriptor.
Mindspeed Technologies
and
Table 5-19
NEXT_PTR
BUFF_PTR
Description/Function
describe the format of the reassembly buffer
Description/Function
™
5.7 Reassembly Control and Status Structures
5.0 Reassembly Coprocessor
5-47