RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 31
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RS8234EBGC
Manufacturer Part Number
RS8234EBGC
Description
RS8234EBGC ATM XBR SAR
Manufacturer
Mindspeed Technologies
Datasheet
1.RS8234EBGC.pdf
(401 pages)
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RS8234
ATM ServiceSAR Plus with xBR Traffic Management
28234-DSH-001-B
Table 6-22.
Table 6-23.
Table 6-24.
Table 6-25.
Table 6-26.
Table 6-27.
Table 6-28.
Table 6-29.
Table 6-30.
Table 6-31.
Table 6-32.
Table 6-33.
Table 6-34.
Table 6-35.
Table 7-1.
Table 7-2.
Table 7-3.
Table 7-4.
Table 7-5.
Table 7-6.
Table 7-7.
Table 7-8.
Table 7-9.
Table 9-1.
Table 9-2.
Table 10-1.
Table 10-2.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 13-1.
Table 14-1.
Table 14-2.
Table 14-3.
Table 14-4.
Table 14-5.
Table 14-6.
Table 14-7.
Table 14-8.
Table 14-9.
Table 15-1.
Table 15-2.
Table 15-3.
Table 15-4.
Table 15-5.
ABR SCH_STATE Field Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-46
ABR Cell Decision Block (ACDB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-48
ABR Cell Type Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-48
ABR Cell Type Decision Vector (ACDV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-48
ABR Rate Decision Block (ARDB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-49
ARDB Field Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-49
ABR Rate Decision Vector (ARDV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-50
Exponent Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-50
Exponent Table Field Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-50
RS_QUEUE Entry -- OAM-PM Reporting Information Ready for Transmission . . . . . . . . . . 6-52
RS_QUEUE Entry -- Forward ER RM Cell Received. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-52
RS_QUEUE Entry -- Backward ER RM Cell Received. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-52
RS_QUEUE Field Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-53
Scheduler Internal SRAM Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-54
OAM Functions of the ATM Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
VCI Values for F4 OAM Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
PTI Values for F5 OAM Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
OAM Type and Function Type Identifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
PM-OAM Field Initialization For Any PM_INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12
SEG_PM Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-16
SEG_PM Field Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-16
RSM_PM Table Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17
RSM_PM Table Field Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17
Memory Bank Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
Memory Size in Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6
Processor Interface Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Standalone Interface Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-13
EEPROM Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
ATM Physical Interface Mode Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-2
UTOPIA Mode Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-3
Slave UTOPIA Mode Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-3
RS8234 Control and Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-2
Table of Values for Segmentation Control Register Initialization . . . . . . . . . . . . . . . . . . . . . 14-2
Table of Values for Segmentation Internal Memory Initialization. . . . . . . . . . . . . . . . . . . . . 14-3
Table of Values for Segmentation SAR Shared Memory Initialization . . . . . . . . . . . . . . . . . 14-4
Table of Values for Scheduler Control Register Initialization . . . . . . . . . . . . . . . . . . . . . . . . 14-6
Table of Values for Sch SAR Shared Memory Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 14-7
Table of Values for Reassembly Control Register Initialization . . . . . . . . . . . . . . . . . . . . . . 14-9
Table of Values for Reassembly Internal Memory Initialization . . . . . . . . . . . . . . . . . . . . . 14-11
Table of Values for Reassembly SAR Shared Memory Initialization. . . . . . . . . . . . . . . . . . 14-12
Table of Values for General Control Register Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 14-16
PCI Bus Interface Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-1
UTOPIA Interface Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-3
Slave UTOPIA Interface Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-4
System Clock Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-6
SRAM Organization Loading Dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-8
Mindspeed Technologies
™
List of Tables
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