RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 99

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

RS8234
ATM ServiceSAR Plus with xBR Traffic Management
Table 4-13. Segmentation Buffer Descriptor Field Descriptions (3 of 3)
4.3.4 Transmit Queues
Table 4-15. Transmit Queue Entry Field Descriptions
28234-DSH-001-B
Table 4-14. Transmit Queue Entry Format
Word 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
WR_GFC
WR_PTI
WR_VCI
PTI_DATA
VCI_DATA
NEW_VCI
SEG_VCC_INDEX
VLD
0
4.3.4.1 Entry Format
Field Name
Field Name
0 - The RS8234 generates the GFC field from the VCC Table Entry ATM_HEADER field.
1 - The RS8234 overwrites the ATM header GFC field for all cells in the buffer with GFC_DATA.
Global GFC changes (active for all buffers of VCC) can be set in the VCC Table Entry ATM header.
This bit is active only when HEADER_MOD is set.
0 - The RS8234 generates the PTI field from the VCC Table Entry ATM_HEADER field.
1 - The RS8234 overwrites the ATM header PTI field for all cells in the buffer with PTI_DATA.
The host may use this feature to generate F5 and PM OAM cells. See
This bit is active only when HEADER_MOD is set.
This bit disables PM TUC and BIP16 calculations.
0 - The RS8234 generates the VCI field from the VCC Table Entry ATM_HEADER field.
1 - The RS8234 overwrites the ATM header VCI field for all cells in the buffer with (0x0000|VCI_DATA).
(MSBs of VCI are set to zero.)
Used to generate F4 OAM cells. (See
This bit is active only when HEADER_MOD is set.
This bit disables PM TUC and BIP16 calculations.
Data for WR_PTI option. Normally used to generate OAM cells.
Data for WR_VCI option. Normally used to generate OAM cells.
Data for the RPL_VCI. The RS8234 overwrites the VCC Table Entry ATM_HEADER VCI field with this
data. Therefore, the effect is permanent until the next buffer descriptor with RPL_VCI is processed.
Identifies the VCC Entry in the VCC Table. The RS8234 links this buffer descriptor to the identified VCC.
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0 - Entry invalid. Waiting for the host to submit new data for segmentation.
1 - Entry valid. The SAR will process the entry when its read pointer into the queue advances to this
entry.
Written to one by the host when submitting a new entry. The SAR clears this bit to zero when it has
successfully linked the buffer descriptor chain to the VCC Table.
The host submits chains of SBDs to the RS8234 by writing a single word transmit
queue entry.
Mindspeed Technologies
Table 4-14
and
Chapter
Table 4-15
Description
Description
7.0.)
SEG_BD_PNTR
describe the format of these entries.
™
4.3 Segmentation Control and Data Structures
4.0 Segmentation Coprocessor
Chapter
7.0.
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