RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 197

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

RS8234
ATM ServiceSAR Plus with xBR Traffic Management
28234-DSH-001-B
6.4.2.1 Configuring the
Link for GFC Operation
The following describes an example sequence of how to auto-configure a link for
GFC operation after the link has been initialized:
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Host sets a software GFC initialization timer = 0.
Disable reassembly coprocessor by setting RSM_CTRL0(RSM_EN) = 0.
Set the framer chip to pass unassigned cells.
Enable the GFC link interrupt (GFC_LINK), by setting HOST_IMASK0
(EN_GFC_LINK) = 1.
Read HOST_ISTAT0 register twice to clear it.
Enable the reassembly coprocessor and set the GFC initialization timer to
some user-assigned value.
Upon occurrence of an interrupt and before the GFC initialization timer
expires, read HOST_ISTAT0. If GFC_LINK is a logic high, continue. If
the timer expires before GFC_LINK is detected, do not enable the link for
GFC processing.
Set SEG_CTRL(SEG_GFC) to a logic high.
Set the GFCn bit(s) in the SCH_PRI register to enable the appropriate
priority queue(s) for GFC controlled operation.
Set the framer chip to generate unassigned cells with GFC field in cell
headers set to the value of 0001.
Mindspeed Technologies
™
6.4 GFC Flow Control Manager
6.0 Traffic Management
6-37