RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 260
RS8234EBGC
Manufacturer Part Number
RS8234EBGC
Description
RS8234EBGC ATM XBR SAR
Manufacturer
Mindspeed Technologies
Datasheet
1.RS8234EBGC.pdf
(401 pages)
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10.0 Local Processor Interface
10.9 RS8234 Reset
10-18
10.9 RS8234 Reset
The RS8234 must be reset by the host processor prior to system initialization for
proper operation. This can be done in one of two ways: by asserting the external
HRST* pin (which is normally connected to the system power-up reset circuitry),
or by setting the GLOBAL_RESET bit in the Configuration Register 0
[CONFIG0;0x14]. The HRST* pin must be deasserted and GLOBAL_RESET
must be cleared before beginning the RS8234 initialization process.
pin to be driven active. The reset to the local processor will stay active until the
LP_ENABLE bit in the CONFIG0 Register is set to a logic high. When using the
GLOBAL_RESET bit, the processor must manually set or clear the appropriate
bits in the CONFIG0 Register.
Asserting the HRST* input pin automatically causes the local processor reset
Mindspeed Technologies
ATM ServiceSAR Plus with xBR Traffic Management
™
28234-DSH-001-B
RS8234
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