RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 277
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RS8234EBGC
Manufacturer Part Number
RS8234EBGC
Description
RS8234EBGC ATM XBR SAR
Manufacturer
Mindspeed Technologies
Datasheet
1.RS8234EBGC.pdf
(401 pages)
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RS8234
ATM ServiceSAR Plus with xBR Traffic Management
Figure 12-4. Transmit Timing in UTOPIA Mode with Octet Handshake
28234-DSH-001-B
TXD/TXPAR
NOTE(S):
(1)
(2)
FRCTRL
TXSOC
TXCLAV
TxEN* goes active of TxClav is inactive at previous rising clock edge and a complete cell in the transmit FIFO buffer.
TxEN* goes inactive one to four clock cycles after TxClav goes active.
TXEN*
X
(1)
H1
CLKD3 output, which is a 50% duty cycle clock derived by dividing the CLK2X
input by three.
In UTOPIA mode, the FRCTRL input may be connected to the RS8234
***
Mindspeed Technologies
P44
P45
P46
P47
(2)
™
12.5 UTOPIA Mode Octet Handshake Timing
X
X
12.0 ATM Utopia Interface
P48
H1
H2
100074_083
12-7
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