RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 307

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

RS8234
ATM ServiceSAR Plus with xBR Traffic Management
28234-DSH-001-B
14-12
8-4
Bit
17
16
15
11
10
9
3
2
1
0
Field
Size
1
1
1
3
1
1
1
5
1
1
1
1
Type
—
—
L
L
E
L
L
E
E
E
E
E
RSM_RUN
RSM_HS_WRITE
RSM_LS_WRITE
Reserved
SEG_RUN
SEG_HS_WRITE
SEG_LS_WRITE
Reserved
AAL5_DSC_RLOVR
CELL_DSC_RLOVR
CELL_RCVD_RLOVR
CELL_XMT_RLOVR
Mindspeed Technologies
Name
Set when the reassembly machine is running. Will be
high when the RSM Coprocessor is processing a cell.
Indicates reassembly host status has been written by
RS8234 to status queues 0 through 15. For queue
number, read HOST_ST_WR which must be read in order
to clear status bit.
Indicates reassembly local status has been written by
RS8234.
Read as zero.
Set when the segmentation machine is running. Will be
high when SEG_ENABLE bit in SEG_CTRL is high or
when processing the last cell after SEG_ENABLE is low.
Indicates segmentation host status has been written by
the RS8234 to status queues 0 through 15. For queue
number, read HOST_ST_WR which must be read in order
to clear status bit.
Indicates that a segmentation local status queue has
been written by the RS8234.
Read as zero.
Set on the occurrence of an AAL5_DSC_CNT rollover.
Set on the occurrence of a CELL_DSC_CNT rollover.
Set on the occurrence of a CELL_RCVD_CNT rollover.
Set on the occurrence of a CELL_XMIT_CNT rollover.
™
13.6 Counters and Status Registers
Description
13.0 RS8234 Registers
13-25