RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 369

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

The RS8234 supports boundary scan testing conforming to IEEE standard 1149.1-1990 and Supplement B,
1994. This appendix is intended to assist the customer in developing boundary scan tests for printed circuit
boards and systems that use the RS8234. It is assumed that the reader is familiar with boundary scan
terminology.
and system-level testing. This circuitry also conforms to IEEE Std 1149.1-1990. The boundary scan test logic is
accessed through five dedicated pins on the RS8234 (see
NOTE:
Table A-1. Boundary Scan Signals
and the Tap Access Port (TAP) controller (see
28234-DSH-001-B
TRST*
TCLK
TMS
TDO
TDI
Name
The Boundary Scan section of the RS8234 provides access to all external I/O signals of the device for board
The test circuitry includes the Boundary Scan Register, a BYPASS Register, an Instruction Register (IR),
Pin
This section uses the following pin names:
Test Logic Reset
Test Clock
Test Mode Select
Serial Test Data Output
Serial Test Data Input
Signal Name
Appendix A Boundary Scan
A
RXFLAG=RXCLAV
RXMARK=RXSOC
TXFLAG=TXCLAV
TXMARK=TXSOC
Mindspeed Technologies
Out
I/O
In
In
In
In
Figure
When at a logic low, this signal asynchronously resets the boundary scan
test circuitry and puts the test controller into the reset state. This state
allows normal system operation.
Test clocking is generated externally by the system board or by the tester.
TCLK can be stopped in either the high state or the low state.
Decoded to control test operations.
Outputs serial test pattern data.
Input for serial test pattern data.
A-2).
Table
A-1).
™
Definition
A-1