RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 39

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

RS8234
ATM ServiceSAR Plus with xBR Traffic Management
Figure 2-5. Segmentation Buffer Isolation — Data Buffers Separated from Descriptors
28234-DSH-001-B
LEGEND:
Host Memory
Data Buffers
2
Associations (Pointing Function)
Data Reads
Host Actions
SAR Actions
(Write)
3
1
the transmit queue for segmentation. The process is as follows:
Figure 2-5
1.
2.
3.
The host links the buffer descriptors (in SAR shared memory) for the
associated data buffers (in host memory) containing the PDU to be
segmented.
The host then formats a two word transmit queue entry and writes this
entry to the transmit queue. The location of the first buffer descriptor in
the linked chain is contained in the transmit queue entry.
The segmentation coprocessor automatically senses the presence of new
transmit queue entries, reads them, and schedules the new data for
transmission. The transmit queue acts as a FIFO for segmentation task
pointers.
Mindspeed Technologies
PCI
illustrates how the host submits linked data buffers (i.e., PDUs) to
SEG Buffer
Descriptors
(Read)
2.2 High Performance Host Architecture with Buffer Isolation
2
3
1
(Write)
™
(Read)
SEG Coprocessor
2.0 Architecture Overview
Transmit
Queues
CN8234
(Read)
SEG Memory
2-7