R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1178

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 23 Flash Memory
23.6
The following describes the software commands. A command or data should be read or written in
16-bit units at an even address in the user ROM or data flash area. When a command code is
written, the lower eight bits (D7 to D0) are ignored.
Table 23.6 List of Software Commands
[Legend]
SRD:
WA0:
WA1:
WD0:
WD1:
BA:
LBD:
×:
xx:
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Software
Command
Read array
Read status
register
Clear status
register
Program
Block erase
Block blank
check
Lock bit
program
Read lock bit
data
Address to write the lower word (the address for the first bus cycle must be the same even
Examples) block 0: H'00000000, block 1: H'00010000
Status register data (D7 to D0)
Address to write the upper word
Lower word of write data (16 bits)
Upper word of write data (16 bits)
Lowest address of the block (note that this should be an even address).
Lock bit data (D6)
A desired even address in the user ROM, data flash, or user boot ROM.
Lower eight bits of command code (ignored)
address as that for the second bus cycle).
Software Commands
Mode
Write
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Address
×
×
×
WA0
×
×
×
×
H'41xx
Data
(D15 to
D0)
H'FFxx
H'70xx
H'50xx
H'20xx
H'25xx
H'77xx
H'71xx
Mode
Read
Write
Write
Write
Write
Read
Second Bus Cycle
Address
×
WA0
BA
BA
BA
BA
Data
(D15 to
D0)
SRD
WD0
H'D0xx
H'D0xx
H'D0xx
LBD
H8S/2427, H8S/2427R, H8S/2425 Group
Mode
Write
REJ09B0565-0100 Rev. 1.00
Third Bus Cycle
Address
WA1
Jul 22, 2010
Data
(D15 to
D0)
WD1