R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 363

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
8.3.3
ETCR is a 16-bit readable/writable register that specifies the number of transfers of channels 0, 1,
2, and 3.
The function of ETCR in sequential mode and idle mode differs from that in repeat mode.
In sequential mode and idle mode, ETCR functions as a 16-bit transfer counter. ETCR is
decremented by 1 each time a data transfer is performed, and when the count reaches H'0000, the
DTE bit in DMAECRS is cleared, and transfer ends.
In repeat mode, ETCR functions as an 8-bit transfer counter (ETCRL) and a transfer count holding
register (ETCRH). ETCRL is decremented by 1 each time a data transfer is performed, and when
the count reaches H'00, ETCRL is loaded with the value in ETCRH. At this point, MAR is
automatically restored to the value it had when the data transfer was started. The DTE bit in
DMAECRS is not cleared, and so data transfers can be performed repeatedly until the DTE bit is
cleared.
All bits in ETCR are initialized to 0 at a reset.
8.3.4
DMACRS controls the operation of DMAC channels 0, 1, 2, and 3.
• DMACRS0, DMACRS1, DMACRS2, and DMACRS3
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Bit
7
Bit Name
DTSZ
Transfer Count Register (ETCR)
DMA Control Register S (DMACRS)
Initial Value
0
R/W
R/W
Description
Data Transfer Size
Selects the size of data to be transferred at one
time.
0: Byte-size transfer
1: Word-size transfer
Section 8 DMA Controller (DMAC)
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