R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1252

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Section 26 Power-Down Modes
26.1.1
SBYCR performs software standby mode control.
Page 1222 of 1448
Bit
7
6
5
4
Bit Name
SSBY
OPE
Standby Control Register (SBYCR)
0
1
0
0
Initial Value
R/W
R/W
R/W
Description
Software Standby
This bit specifies the transition mode after
executing the SLEEP instruction
0: Shifts to sleep mode after the SLEEP
1: Shifts to software standby mode after the
This bit does not change from 1 when clearing the
software standby mode by using external
interrupts and shifting to normal operation. This bit
should be written 0 when clearing.
Output Port Enable
Specifies whether the output of the address bus
and bus control signals (CS0 to CS7, AS, RD,
HWR, LWR, UCAS*, LCAS*) is retained or set to
the high-impedance state in software standby
mode.
0: In software standby mode, address bus and bus
1: In software standby mode, address bus and bus
Reserved
This bit is always read as 0. The initial value
should not be changed.
Reserved
This bit is always read as 0. The write value
should always be 0.
instruction is executed
SLEEP instruction is executed
control signals are high-impedance
control signals retain output state
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010

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