R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 372

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24278NVFQU
Manufacturer:
REALTEK
Quantity:
2 300
Part Number:
R4F24278NVFQU
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2427, H8S/2427R, H8S/2425 Group
Section 8 DMA Controller (DMAC)
8.3.9
Transfer Count Registers A and B (ETCRA and ETCRB)
ETCRA and ETCRB are 16-bit readable/writable registers that specify the number of transfers of
channels 4 and 5.
The function of ETCRA and ETCRB in normal mode differs from that in block transfer mode.
In normal mode, ETCRA functions as a 16-bit transfer counter. ETCRA is decremented by 1 each
time a data transfer is performed, and when the count reaches H'0000, transfer ends. ETCRB
cannot be used in normal mode
In block transfer mode, ETCRA functions as an 8-bit block size counter (ETCRAL) and a block
size holding register (ETCRAH). ETCRAL is decremented by 1 each time a data transfer of one
byte or one word is performed, and when the count reaches H'00, ETCRAL is loaded with the
value in ETCRAH. So by setting the block size in ETCRAH and ETCRAL, it is possible to
repeatedly transfer blocks consisting of any desired number of bytes or words.
In block transfer mode, ETCRB functions as a 16-bit block transfer counter. ETCRB is
decremented by 1 each time a block is transferred, and transfer ends when the count reaches
H'0000.
All bits in ETCRA and ETCRB are initialized to 0 at a reset.
Page 342 of 1448
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010

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