R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 288

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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R4F24278NVFQU
Manufacturer:
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Section 7 Bus Controller (BSC)
Table 7.10 Synchronous DRAM Interface Pins
Page 258 of 1448
Pin
CS2
CS3
CS4
CS5
OE
UCAS
LCAS
A15 to A0
D15 to D0
With
Synchronous
DRAM Setting
RAS
CAS
WE
SDRAMφ
CKE
DQMU
DQML
A15 to A0
D15 to D0
Name
Row address strobe
Column address strobe
Write enable
Clock
Clock enable
Upper data mask enable Output
Lower data mask enable Output
Address pins
Data pins
I/O
Output
Output
Output
Output
Output
Output
I/O
H8S/2427, H8S/2427R, H8S/2425 Group
Function
Row address strobe when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Column address strobe when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Write enable strobe when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Clock only for synchronous
DRAM
Clock enable signal when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Upper data mask enable for
16-bit continuous
synchronous DRAM space
access/data mask enable for
8-bit continuous synchronous
DRAM space access
Lower data mask enable
signal for 16-bit continuous
synchronous DRAM space
access
Row address/column address
multiplexed output pins
Data input/output pins
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010

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