R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1264
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R4F24278NVFQU
Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24278NVFQU.pdf
(1482 pages)
Specifications of R4F24278NVFQU
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R4F24278NVFQU
Manufacturer:
REALTEK
Quantity:
2 300
Company:
Part Number:
R4F24278NVFQU
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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H8S/2427, H8S/2427R, H8S/2425 Group
Section 26 Power-Down Modes
(4)
Hardware Standby Mode Timing when Power Is Supplied
When entering hardware standby mode immediately after the power is supplied, the RES signal
must be driven low for a given period with retaining the STBY signal high. After the RES signal is
canceled, drive the STBY signal low.
(1) Power supply
RES
(2) Reset period
STBY
(3) Hardware standby mode
Figure 26.4 Hardware Standby Mode Timing when Power Is Supplied
26.2.5
Module Stop Function
Module stop function can be set for individual on-chip peripheral modules.
When an MSTP bit in MSTPCR, EXMSTPCR, or RMMSTPCR is set to 1, the corresponding
module stops operation at the end of the bus cycle and a transition is made to the module stop
state. The CPU continues operating independently.
When an MSTP bit is cleared to 0, the corresponding module stop state is cleared and the module
starts operating at the end of the bus cycle. In the module stop state, the internal state of the SSU is
reset but the internal states of the other peripheral modules are retained.
After reset clearance, all modules other than the EXDMAC*, DMAC, DTC, and on-chip RAM are
in the module stop state.
The module registers that are set in the module stop state cannot be read or written to.
The module stop function for RAM is only effective for on-chip RAM. When an area of on-chip
RAM is set up as an external address space by bits RAME and EXPE in SYSCR, the resulting
external space is accessible regardless of the module stop setting. Table 26.3 lists the kinds of
operation in case of access to the on-chip RAM area.
Note: * The EXDMAC is not supported by the H8S/2425 Group.
Page 1234 of 1448
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
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