R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 289

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
7.8.5
The synchronous clock (SDRAMφ) is output from the CS5 pin. SDRAMφ is output with the same
phase and timing as φ. Figure 7.55 shows the relationship between φ and SDRAMφ.
7.8.6
The four states of the basic timing consist of one T
output cycle) state, and the T
When areas 2 to 5 are set for the continuous synchronous DRAM space, settings of the WAITE bit
of BCR, RAST, CAST, RCDM bits of DRAMCR, and the CBRM bit of REFCR are ignored.
Figure 7.56 shows the basic timing for synchronous DRAM.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Synchronous DRAM Clock
Basic Timing
SDRAMφ
φ
Figure 7.55 Relationship between φ and SDRAMφ
c1
and two T
c2
(column address output cycle) states.
t
cyc
p
(precharge cycle) state, one T
Section 7 Bus Controller (BSC)
r
(row address
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