R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 540

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 10 Data Transfer Controller (DTC)
10.4
Locate the register information in the on-chip RAM (addresses: H'FFBC00 to H'FFBFFF).
Register information should be located at the address that is multiple of four within the range.
Locating the register information in address space is shown in figure 10.3. Locate the MRA, SAR,
MRB, DAR, CRA, and CRB registers, in that order, from the start address of the register
information. In the case of chain transfer, register information should be located in consecutive
areas as shown in figure 10.3 and the register information start address should be located at the
corresponding vector address to the activation source. Figure 10.4 shows correspondences
between the DTC vector address and register information. The DTC reads the start address of the
register information from the vector address set for each activation source, and then reads the
register information from that start address.
When the DTC is activated by software, the vector address is obtained from: DTCVBR[23:0] +
H'0400 + (DTVECR[7:0] × 2). For example, if DTCVBR is H'000000 while DTVECR is H'10,
the vector address is H'000420.
The configuration of the vector address is the same in both normal mode* and advanced mode, a
2-byte unit being used in both cases. These two bytes specify the lower bits of the register
information start address.
Note: * Not available in this LSI.
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Location of Register Information and DTC Vector Table
Source flag cleared
IRQ interrupt
peripheral
DTVECR
modules
On-chip
DTCCR
Figure 10.2 Block Diagram of DTC Activation Source Control
Interrupt
request
DTCER
Select
Clear
Interrupt controller
controller
Clear
DTC
Clear request
Interrupt mask
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
CPU
Jul 22, 2010