R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 408
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R4F24278NVFQU
Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24278NVFQU.pdf
(1482 pages)
Specifications of R4F24278NVFQU
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R4F24278NVFQU
Manufacturer:
REALTEK
Quantity:
2 300
Company:
Part Number:
R4F24278NVFQU
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 8 DMA Controller (DMAC)
8.5.4
In common register enabled mode, repeat mode can be specified by setting the MDS bit in
DMACRS to 1, and clearing the DTIE bit in DMABCRL to 0. In common register disabled mode,
repeat mode can be specified by setting the MDS bit in DMACRS to 1, and clearing the IDLE bit
in DMAECRS to 0. In repeat mode, MAR is updated after each byte or word transfer in response
to a single transfer request, and this is executed the number of times specified in ETCRL. On
completion of the specified number of transfers, MAR and ETCRL are automatically restored to
their original settings and operation continues. One address is specified by MAR, and the other by
IOAR. The transfer direction can be specified by the DTDIR bit in DMACRS. Table 8.6
summarizes register functions in repeat mode.
Table 8.6
Page 378 of 1448
Register
23
23
H'FF
Repeat Mode
15
7
7
ETCRH
ETCRL
Register Functions in Repeat Mode
MAR
IOAR
0
0
0
0
DTDIR = 0 DTDIR = 1 Initial Setting
Source
address
register
Destination
address
register
Holds number of
transfers
Transfer counter
Function
Destination
address
register
Source
address
register
Start address of
transfer destination
or transfer source
Start address of
transfer source or
transfer destination
Number of transfers
Number of transfers
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Operation
Incremented/
decremented every
transfer.
Initial setting is
restored when the
value reaches
H'0000
Fixed
Fixed
Decremented every
transfer.
Loaded with ETCRH
value when the
value reaches H'00
Jul 22, 2010
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