R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1185

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
Section 23 Flash Memory
23.6.7
Lock Bit Program
This command sets the lock bit of a block to 0 (locked state).
Write H'77xx in the first bus cycle and H'D0xx to the lowest address (an even address) of the
target block in the second bus cycle; 0 is written to the lock bit of the specified block. The address
value in the first bus cycle should be set to match the lowest address of the block that is specified
in the second bus cycle.
Figure 23.7 shows a flowchart of the lock bit program command processing. The lock bit status
(lock bit data) can be read using the read lock bit data command.
The end of writing can be confirmed using the FMRDY bit in FLMSTR. The FMRDY bit is 0
(busy) during writing and becomes 1 (ready) after writing has finished.
For the lock bit function and the method for setting the lock bit to 1 (unlocked state), refer to
section 23.7, Data Protection Function.
Figure 23.7 shows a flowchart of the lock bit program command processing.
REJ09B0565-0100 Rev. 1.00
Page 1155 of 1448
Jul 22, 2010