R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 865

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
R4F24278NVFQU
Manufacturer:
REALTEK
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Part Number:
R4F24278NVFQU
Manufacturer:
Renesas Electronics America
Quantity:
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H8S/2427, H8S/2427R, H8S/2425 Group
12.10.12 Contention between TCNT Write and Overflow/Underflow
If there is an up-count or down-count in the T
overflow/underflow occurs, the TCNT write takes precedence and the TCFV/TCFU flag in TSR is
not set.
Figure 12.54 shows the operation timing when there is contention between TCNT write and
overflow.
12.10.13 Multiplexing of I/O Pins
In this LSI, the TCLKA input pin is multiplexed with the TIOCC0 I/O pin, the TCLKB input pin
with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O pin, and the TCLKD input
pin with the TIOCB2 I/O pin. When an external clock is input, compare match output should not
be performed from a multiplexed pin.
12.10.14 Interrupts in Module Stop State
If a transition is made to the module stop state when an interrupt has been requested, it will not be
possible to clear the CPU interrupt source or the DMAC or DTC activation source. Interrupts
should therefore be disabled before entering the module stop state.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Figure 12.54 Contention between TCNT Write and Overflow
φ
Address
Internal write signal
TCNT
TCFV flag
TCNT write cycle
2
state of a TCNT write cycle, when
T1
T2
N
Write data
M
Section 12 16-Bit Timer Pulse Unit (TPU)
Page 835 of 1448

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