R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1267

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
26.4
Output of the SDRAMφ clock can be controlled by the SDPSTP bit in SCKCR. When the
SDPSTP bit is set to 1, the SDRAMφ clock stops at the end of the bus cycle and the pin can be
used as a general port. SDRAMφ clock output is enabled when the SDPSTP bit is cleared to 0
regardless of the DDR value. Table 26.5 shows the state of the SDRAMφ pin in each processing
state.
Note: The SDRAM interface is not supported by the H8S/2425 Group.
Table 26.5 SDRAMφ Pin State in Each Processing State
Note: SDRAMφ is not available in the H8S/2427 and H8S/2425 Groups.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
SDPSTP
0
1
1
Register Setting
In these products, this pin functions as a general pin regardless of the SDPSTP bit setting.
SDRAMφ Clock Output Control
DDR
X
0
1
Normal
Operating State Sleep Mode
SDRAMφ output
High impedance
PH1/CS5/RAS5
output
SDRAMφ output
High impedance High impedance
H1/CS5/RAS5
output
Software
Standby Mode
Fixed high
H1/CS5/RAS5
output
Hardware
Standby Mode
High impedance
High impedance
High impedance
Section 26 Power-Down Modes
All Module
Clocks Stop
Mode
SDRAMφ
output
High
impedance
H1/CS5/RAS5
output
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