SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 1087
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SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- SAM9260 PDF datasheet #3
- SAM9261 PDF datasheet #4
- SAM9263 PDF datasheet #5
- SAM9263 PDF datasheet #6
- Current page: 1087 of 1109
- Download datasheet (17Mb)
51. Revision History
6249I–ATARM–3-Oct-11
Revision
6249I
Revision
6249H
Comments
Erratum “RSTC: Reset during SDRAM Accesses” removed from Rev A
Erratum “SDCLK Clock Active after Reset “removed from Rev B
47.3.2 “Power Sequence“ moved to a
EBI0_NCS3 restriction added to
In
Matrix (MATRIX) User
1st column header of
Section 33. “Two-wire Interface (TWI)” on page 477
Erratum added to rev A as
rev B as
Voltage row added to
Rev A and B MCI errata
Bit values changed in
‘
page 1026
Second paragraph in
Section 47.8.4 “SDRAMC Signals” on page 1044
Table 47-27, ”SDRAMC Clock Signal”, on page 1044
‘Selectable by software...’ removed from
3 Rev B errata added: USART
Section 50.3.15.3 “Unexpected Delay on TD output” on page
on page
Rev A USART errata
All peripheral clocks are deactivated’ added to
Comments
Electrical Characteristics:
Table 47-3, ”Power Consumption for Different Modes”
Table 47-6, ”Processor Clock Waveform Parameters”
edited: VDDCORE 1.2V --> 1.3V ± 2%.
Back page:
Latest back page file used.
Section 20. ”AT91SAM9263 Bus
Section 50.2.13.1 “RSTC: Reset during SDRAM Accesses” on page 1065
1082.
The most recent version appears first in the tables that follow. The initials “rfo” indicate changes
requested by product experts, or made during proof reading as part of the approval process.
Section 50.2.21.4 on page 1071
Section 5.3 “Programmable I/O Lines Power Supplies” on page 13
Table 49-1, ”AT91SAM9263 Ordering Information”, on page 1058
Table 47-8, ”XIN Clock Electrical Characteristics”, on page
Section 28.9.16 “PMC Interrupt Mask Register” on page
Interface”.
”SDIO interrupt does not work with slots other than A”
Section 50.2.13.1 “RSTC: Reset during SDRAM Accesses” on page
Section 50.3.21.6 “Bad value in Number of Errors Register” on page
Matrix”, slave number changed from 7 to 6 in ”Description”, and in
Section 10.4.2 “ETM
Section 47.4 on page 1029
Table 47-2, ”DC Characteristics”, on page
edited, 2 tables inserted.
changed: TWI2_6212E.fm --> TWI_6212C.fm.
Section 47.3.1 “Power Consumption versus Modes” on
edited.
to
and
edited: VDDCORE 1.2V --> 1.3V.
Section 50.2.21.6 on page 1072
™
” on page 41
Table 47-7, ”Master Clock Waveform Parameters”
1081, and PWM
Section 50.3.16.1 “Zero Period”
375.
edited.
1031.
1025.
edited.
edited.
duplicated to Rev B. 6475
AT91SAM9263
1065, and to
1085, SSC
”Bus
Change
Request
Ref.
RFO
6053
6055
6066
6081
6083
6165
6169
6311
6343
6395
6396
6402
6466
Change
Request
Ref.
7345
rfo
1087
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