SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 529

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 34-8. NRZ to Manchester Encoding
Figure 34-9. Preamble Patterns, Default Polarity Assumed
6249I–ATARM–3-Oct-11
Manchester
Manchester
Manchester
Manchester
encoded
encoded
encoded
encoded
data
data
data
data
Manchester
encoded
encoded
sists of a user-defined pattern that indicates the beginning of a valid data.
illustrates these patterns. If the start frame delimiter, also known as start bit, is one bit, (ONEBIT
at 1), a logic zero is Manchester encoded and indicates that a new character is being sent seri-
ally on the line. If the start frame delimiter is a synchronization pattern also referred to as sync
(ONEBIT at 0), a sequence of 3 bit times is sent serially on the line to indicate the start of a new
character. The sync waveform is in itself an invalid Manchester waveform as the transition
The Manchester encoded character can also be encapsulated by adding both a configurable
preamble and a start frame delimiter pattern. Depending on the configuration, the preamble is a
training sequence, composed of a pre-defined pattern with a programmable length from 1 to 15
bit times. If the preamble length is set to 0, the preamble waveform is not generated prior to any
character. The preamble pattern is chosen among the following sequences: ALL_ONE,
ALL_ZERO, ONE_ZERO or ZERO_ONE, writing the field TX_PP in the US_MAN register, the
field TX_PL is used to configure the preamble length.
valid patterns. To improve flexibility, the encoding scheme can be configured using the
TX_MPOL field in the US_MAN register. If the TX_MPOL field is set to zero (default), a logic
zero is encoded with a zero-to-one transition and a logic one is encoded with a one-to-zero tran-
sition. If the TX_MPOL field is set to one, a logic one is encoded with a one-to-zero transition
and a logic zero is encoded with a zero-to-one transition.
A start frame delimiter is to be configured using the ONEBIT field in the US_MR register. It con-
NRZ
data
data
Txd
Txd
Txd
Txd
Txd
8 bit width "ZERO_ONE" Preamble
8 bit width "ONE_ZERO" Preamble
8 bit width "ALL_ZERO" Preamble
1
8 bit width "ALL_ONE" Preamble
0
1
1
0
0
0
Figure 34-9
SFD
SFD
SFD
SFD
1
AT91SAM9263
illustrates and defines the
DATA
DATA
DATA
DATA
Figure 34-10
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