SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 41

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SAM9263

Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9263

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
10.4
10.4.1
10.4.2
10.4.3
10.4.4
10.4.5
10.4.6
10.4.7
6249I–ATARM–3-Oct-11
System Resource Multiplexing
LCD Controller
ETM
EBI1
Ethernet 10/100MAC
SSC
USART
NAND Flash
The LCD Controller can interface with several LCD panels. It supports 4 bits per pixel (bpp), 8
bpp or 16 bpp without limitation. Interfacing 24 bpp TFT panels prevents using the Ethernet
MAC. 16 bpp TFT panels are interfaced through peripheral B functions, as color data is output
on LCDD3 to LCDD7, LCDD11 to LCDD15 and LCDD19 to LCDD23. Intensity bit is output on
LCDD10. Using the peripheral B does not prevent using MAC lines. 16 bpp STN panels are
interfaced through peripheral A and color data is output on LCDD0 to LCDD15, thus MAC lines
can be used on peripheral B.
Mapping the LCD signals on peripheral A and peripheral B makes is possible to use 24 bpp TFT
panels in 24 bits (peripheral A) or 16 bits (peripheral B) by reprogramming the PIO controller and
thus without hardware modification.
Using the ETM prevents the use of the EBI0 in 32-bit mode. Only 16-bit mode (EBI0_D0 to
EBI0_D15) is available, makes EBI0 unable to interface CompactFlash and NAND Flash cards,
reduces EBI0’s address bus width which makes it unable to address memory ranges bigger than
0x7FFFFF and finally it makes impossible to use EBI0_NCS2 and EBI0_NCS3.
Using the following features prevents using EBI1 in 32-bit mode:
Using the following features of EBI1 prevent using Ethernet 10/100MAC:
Using SSC0 prevents using the AC97 Controller and Two-wire Interface.
Using SSC1 prevents using DMA Request 1, PWM0, PWM1, LCDCC and PCK1.
Using USART2 prevents using EBI0’s NWAIT signal, Chip Select 4 and CompactFlash Chip
Enable 2.
Using USART1 prevents using EBI0’s Chip Select 5 and CompactFlash Chip Enable1.
Using the NAND Flash interface on EBI1 prevents using Ethernet MAC.
• the second slots of MCI0 and/or MCI1
• USART0
• DMA request 0 (DMARQ0)
• SDRAM
• NAND (unless NANDCS, NANDOE and NANDWE are managed by PIO)
• SMC 32 bits (SMC 16 bits is still available)
• NCS1, NCS2 are not available in SMC mode
AT91SAM9263
41

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