SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 625

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

36.6.4
36.6.4.1
36.6.4.2
36.6.4.3
36.6.4.4
6249I–ATARM–3-Oct-11
Power Management
Powering Down the AC-Link
Waking up the AC-link
Wake-up Triggered by the AC97 Controller
Wake-up Triggered by the AC97 Codec
AC97 controller sees one or more of the newly defined slot request flags set active (low) in a
given audio input frame, it must pass along the next PCM sample for the corresponding slot(s) in
the AC-link output frame that immediately follows.
The variable Sample Rate mode is enabled by performing the following steps:
Slot 1 of the input frame is automatically interpreted as SLOTREQ signaling bits. The AC97 Con-
troller will automatically fill the active slots according to both SLOTREQ and AC97C_OCA
register in the next transmitted frame.
The AC97 Codecs can be placed in low power mode. The application can bring AC97 Codec to
a power down state by performing sequential writes to AC97 Codec powerdown register. Both
the bit clock (clock delivered by AC97 Codec, AC97CK) and the input line (AC97RX) are held at
a logic low voltage level. This puts AC97 Codec in power down state while all its registers are
still holding current values. Without the bit clock, the AC-link is completely in a power down
state.
The AC97 Controller should not attempt to play or capture audio data until it has awakened
AC97 Codec.
To set the AC97 Codec in low power mode, the PR4 bit in the AC97 Codec powerdown register
(Codec address 0x26) must be set to 1. Then the primary Codec drives both AC97CK and
AC97RX to a low logic voltage level.
The following operations must be done to put AC97 Codec in low power mode:
At this point AC97 Codec is in low power mode.
There are two methods to bring the AC-link out of low power mode. Regardless of the method, it
is always the AC97 Controller that performs the wake-up.
The AC97 Controller can wake up the AC97 Codec by issuing either a cold or a warm reset.
The AC97 Controller can also wake up the AC97 Codec by asserting AC97FS signal, however
this action should not be performed for a minimum period of four audio frames following the
frame in which the powerdown was issued.
This feature is implemented in AC97 modem codecs that need to report events such as Caller-
ID and wake-up on ring.
• Setting the VRA bit in the AC97 Controller Mode Register (AC97C_MR).
• Enable Variable Rate mode in the AC97 Codec by performing a transfer on the Codec
• Disable Channel A clearing CEN field in the AC97C_CAMR register.
• Disable Channel B clearing CEN field in the AC97C_CBMR register.
• Write 0x2680 value in the AC97C_COTHR register.
• Poll the TXEMPTY flag in AC97C_CxSR registers for the
channel.
2
channels.
AT91SAM9263
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