SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 997

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

46.3.1
6249I–ATARM–3-Oct-11
Data Timing
The two data timings using horizontal and vertical synchronization and EAV/SAV sequence syn-
chronization are shown in
In the VSYNC/HSYNC synchronization, the valid data is captured with the active edge of the
pixel clock (ISI_PCK), after SFD lines of vertical blanking and SLD pixel clock periods delay pro-
grammed in the control register.
The ITU-RBT.656-4 defines the functional timing for an 8-bit wide interface.
There are two timing reference signals, one at the beginning of each video data block SAV
(0xFF000080) and one at the end of each video data block EAV(0xFF00009D). Only data sent
between EAV and SAV is captured. Horizontal blanking and vertical blanking are ignored. Use of
the SAV and EAV synchronization eliminates the ISI_VSYNC and ISI_HSYNC signals from the
interface, thereby reducing the pin count. In order to retrieve both frame and line synchronization
properly, at least one line of vertical blanking is mandatory.
Figure 46-3. HSYNC and VSYNC Synchronization
Figure 46-4. SAV and EAV Sequence Synchronization
DATA[7..0]
ISII_PCK
ISI_HSYNC
ISI_VSYNC
DATA[7..0]
ISI_PCK
FF
00
SAV
00
Figure 46-3
80
1 line
Y
Y
Cb
Cb
Y
Y
and
Cr
Cr
Figure
Y
Y
Active Video
Cb
Frame
Cb
46-4.
Y
Cr
Y
Y
Cr
Y
Cb
Y
Cr
Y
AT91SAM9263
Y
Cr
Cb FF
00
EAV
00
9D
997