SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 306

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

• SINC: Source Address Increment
Indicates whether to increment or decrement the source address on every source AMBA transfer. If your device is fetching
data from a source peripheral FIFO with a fixed address, then set this field to “No change”.
00 = Increment
01 = Decrement
1x = No change
• DEST_MSIZE: Destination Burst Transaction Length
Number of data items, each of width DMAC_CTLx.DST_TR_WIDTH, to be written to the destination every time a destina-
tion burst transaction request is made from either the corresponding hardware or software handshaking interface.
• SRC_MSIZE: Source Burst Transaction Length
Number of data items, each of width DMAC_CTLx.SRC_TR_WIDTH, to be read from the source every time a source burst
transaction request is made from either the corresponding hardware or software handshaking interface.
• S_GATH_EN: Source Gather Enable Bit
0 = Gather is disabled.
1 = Gather is enabled.
Gather on the source side is only applicable when the DMAC_CTLx.SINC bit indicates an incrementing or decrementing
address control.
• D_SCAT_EN: Destination Scatter Enable Bit
0 = Scatter is disabled.
1 = Scatter is enabled.
Scatter on the destination side is only applicable when the DMAC_CTLx.DINC bit indicates an incrementing or decrement-
ing address control.
• TT_FC: Transfer Type and Flow Control
The following transfer types are supported.
• Memory to Memory
• Memory to Peripheral
• Peripheral to Memory
Flow Control can be assigned to the DMAC, the source peripheral, or the destination peripheral.
306
TT_FC
000
001
010
011
100
101
110
111
AT91SAM9263
Transfer Type
Memory to Memory
Memory to Peripheral
Peripheral to Memory
Peripheral to Peripheral
Peripheral to Memory
Peripheral to Peripheral
Memory to Peripheral
Peripheral to Peripheral
Peripheral
Source Peripheral
Peripheral
Destination Peripheral
Flow Controller
DMAC
DMAC
DMAC
DMAC
6249I–ATARM–3-Oct-11