SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 957

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

45. Two D Graphics Controller (TDGC)
45.1
6249I–ATARM–3-Oct-11
Description
The Two D Graphics Controller (TDGC) features a hardware accelerator which highly simplifies
drawing tasks and graphic management operations. The hardware accelerator makes it easy to
draw lines and complex polygons and to perform block transfers within the frame buffer.
The TDGC also features a draw command queue that automatically executes a more complex
drawing function that is composed of several register accesses.
The TDGC supports access to both external video RAM mapped to any EBI chip selects and
internal RAM (frame buffer). The external video RAM can have an 8-bit, 16-bit or 32-bit data bus.
The TDGC supports 1 bit, 2 bits, 4 bits, 8 bits, 16 bits and 24 bits per pixel. The maximum virtual
memory page can be 2048 x 2048 pixels. The data written into the video RAM by draw functions
can be in little endian, big endian and WinCE format.
The TDGC is connected to the AHB (Advanced High Performance Bus) in two ways: first, as a
master for reading and writing pixel data, and second, as a slave for register configuration.
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