SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 224

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

22.8.1.5
22.8.2
22.8.2.1
200
AT91SAM9263
Read Mode
Null Pulse
Read is Controlled by NRD (READ_MODE = 1):
Figure 22-9. No Setup, No Hold On NRD and NCS Read Signals
Programming null pulse is not permitted. Pulse must be at least set to 1. A null value leads to
unpredictable behavior.
As NCS and NRD waveforms are defined independently of one other, the SMC needs to know
when the read data is available on the data bus. The SMC does not compare NCS and NRD tim-
ings to know which signal rises first. The READ_MODE parameter in the SMC_MODE register
of the corresponding chip select indicates which signal of NRD and NCS controls the read
operation.
Figure 22-10
read data is available t
NRD. In this case, the READ_MODE must be set to 1 (read is controlled by NRD), to indicate
that data is available with the rising edge of NRD. The SMC samples the read data internally on
the rising edge of Master Clock that generates the rising edge of NRD, whatever the pro-
grammed waveform of NCS may be.
NBS0,NBS1,
NBS2,NBS3,
A0, A1
D[31:0]
A[25:2]
MCK
NRD
NCS
shows the waveforms of a read operation of a typical asynchronous RAM. The
PACC
NCS_RD_PULSE
NRD_CYCLE
NRD_PULSE
after the falling edge of NRD, and turns to ‘Z’ after the rising edge of
NCS_RD_PULSE
NRD_PULSE
NRD_CYCLE
NCS_RD_PULSE
NRD_CYCLE
NRD_PULSE
6249I–ATARM–3-Oct-11