SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 320

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

25.4.16
Name: DMAC_ReqSrcReg
Address:0x00800368
Access: Read-write
Reset: 0x0
A bit is assigned for each channel in this register. DMAC_ReqSrcReg[n] is ignored when software handshaking is not
enabled for the source of channel n.
A channel SRC_REQ bit is written only if the corresponding channel write enable bit in the REQ_WE field is asserted on
the same AMBA write transfer.
For example, writing 0x101 writes a 1 into DMAC_ReqSrcReg[0], while DMAC_ReqSrcReg[2:1] remains unchanged. Writ-
ing hex 0x0yy leaves DMAC_ReqSrcReg[2:0] unchanged. This allows software to set a bit in the DMAC_ReqSrcReg
register without performing a read-modified write
• SRC_REQx: Source Request
• REQ_WEx: Request Write Enable
0 = Write disabled
1 = Write enabled
320
31
23
15
–
–
–
7
–
AT91SAM9263
Source Software Transaction Request Register
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
SRC_REQ1
REQ_WE1
25
17
–
–
9
1
6249I–ATARM–3-Oct-11
SRC_REQ0
REQ_WE0
24
16
–
–
8
0