SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 70

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

12.5.5
12.5.5.1
6249I–ATARM–3-Oct-11
Embedded Trace Macrocell
Trace Port
The AT91SAM9263 features an Embedded Trace Macrocell (ETM), which is closely connected
to the ARM926EJ-S Processor. The Embedded Trace is a standard Medium+ level implementa-
tion and contains the following resources:
The Embedded Trace Macrocell of the AT91SAM9263 works in half-rate clock mode and thus
integrates a clock divider. This allows the maximum frequency of all the trace port signals not to
exceed one half of the ARM926EJ-S clock speed.
The Embedded Trace Macrocell input and output resources are not used in the AT91SAM9263.
The Embedded Trace is a real-time trace module with the capability of tracing the ARM9EJ-S
instruction and data.
For further details on Embedded Trace Macrocell, see the ARM documents:
The Trace Port is made up of the following pins:
The trace packet information (address, data) is associated with the processor state indicated by
TPS. Some processor states have no additional data associated with the Trace Packet Port (i.e.
failed condition code of an instruction). The packet is 8-bits wide, and up to two packets can be
output per cycle.
• Four pairs of address comparators
• Two data comparators
• Eight memory map decoder inputs
• Two 16-bits counters
• One 3-stage sequencer
• Four external inputs
• One external output
• One 45-byte FIFO
• ETM9 (Rev2p2) Technical Reference Manual (
• Embedded Trace Macrocell Specification (IHI 0014J)
• TSYNC - the synchronization signal (Indicates the start of a branch sequence on the trace
• TCLK - the Trace Port clock, half-rate of the ARM926EJ-S processor clock.
• TPS0 to TPS2 - indicate the processor state at each trace clock edge.
• TPK0 to TPK15 - the Trace Packet data value.
packet port.)
DDI 0157F
)
AT91SAM9263
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