DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 1031

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

MOV.L #xx:32,ERd R:W 2nd
MOV.L ERs,ERd
MOV.L @ERs,ERd R:W 2nd
MOV.L
@(d:16,ERs),ERd
MOV.L
@(d:32,ERs),ERd
MOV.L @ERs+,
ERd
MOV.L @aa:16,
ERd
MOV.L @aa:32,
ERd
MOV.L ERs,@ERd R:W 2nd
MOV.L ERs,
@(d:16,ERd)
MOV.L ERs,
@(d:32,ERd)
MOV.L ERs,@-ERd R:W 2nd
MOV.L ERs,
@aa:16
MOV.L ERs,
@aa:32
MOVFPE
@aa:16,Rd
MOVTPE
Rs,@aa:16
MULXS.B Rs,Rd
MULXS.W Rs,ERd R:W 2nd
MULXU.B Rs,Rd
MULXU.W Rs,ERd R:W NEXT Internal operation, 19 states
NEG.B Rd
NEG.W Rd
NEG.L ERd
NOP
NOT.B Rd
NOT.W Rd
Instruction
R:W NEXT
R:W 2nd
R:W 2nd
R:W 2nd
R:W 2nd
R:W 2nd
R:W 2nd
R:W 2nd
R:W 2nd
R:W 2nd
Cannot be used in this LSI
R:W 2nd
R:W NEXT Internal operation, 11 states
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
1
R:W 3rd
R:W:M
NEXT
R:W:M 3rd R:W NEXT R:W:M EA R:W EA+2
R:W:M 3rd R:W:M 4th R:W 5th
R:W:M
NEXT
R:W:M 3rd R:W NEXT R:W:M EA R:W EA+2
R:W:M 3rd R:W 4th
R:W:M
NEXT
R:W:M 3rd R:W NEXT W:W:M EA W:W EA+2
R:W:M 3rd R:W:M 4th R:W 5th
R:W:M
NEXT
R:W:M 3rd R:W NEXT W:W:M EA W:W EA+2
R:W:M 3rd R:W 4th
R:W NEXT Internal operation, 11 states
R:W NEXT Internal operation, 19 states
2
R:W NEXT
R:W:M EA R:W EA+2
Internal
operation,
1 state
W:W:M EA W:W EA+2
Internal
operation,
1 state
3
R:W:M EA R:W EA+2
R:W NEXT R:W:M EA R:W EA+2
W:W:M EA W:W EA+2
R:W NEXT W:W:M EA W:W EA+2
4
R:W NEXT R:W:M EA R:W EA+2
R:W NEXT W:W:M EA W:W EA+2
Rev. 4.00 Sep 27, 2006 page 985 of 1130
5
6
Appendix A Instruction Set
7
REJ09B0327-0400
8
9