DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 320

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 8 I/O Ports
Port B Output Data Register (PBODR)
PBODR is an 8-bit readable/writable register that stores output data for the port B pins (PB7 to
PB0). PBODR can always be read or written to, regardless of the contents of PBDDR.
PBODR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port B Input Data Register (PBPIN)
Note:
Reading PBPIN always returns the pin states.
PBPIN has the same address as P8DDR. If a write is performed, data will be written to P8DDR
and the port 8 settings will change.
Rev. 4.00 Sep 27, 2006 page 274 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Modes 2 and 3 (EXPE = 0)
A port B pin becomes an output port if the corresponding PBDDR bit is set to 1, and an input
port if the bit is cleared to 0.
* Determined by the state of pins PB7 to PB0.
PB7ODR PB6ODR PB5ODR PB4ODR PB3ODR PB2ODR PB1ODR PB0ODR
PB7PIN PB6PIN PB5PIN PB4PIN PB3PIN PB2PIN PB1PIN PB0PIN
R/W
—*
R
7
0
7
R/W
—*
R
6
0
6
R/W
—*
R
5
0
5
R/W
—*
R
4
0
4
R/W
—*
R
3
0
3
R/W
—*
R
2
0
2
R/W
—*
R
1
0
1
R/W
—*
R
0
0
0

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