DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 458

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 14 Watchdog Timer (WDT)
Bit 7—Overflow Flag (OVF): A status flag that indicates that TCNT has overflowed from H'FF
to H'00.
Bit 7
OVF
0
1
Note:
Bit 6—Timer Mode Select (WT/IT IT IT IT): Selects whether the WDT is used as a watchdog timer or
interval timer. If used as an interval timer, the WDT generates an interval timer interrupt request
(WOVI) when TCNT overflows. If used as a watchdog timer, the WDT generates a reset or NMI
interrupt when TCNT overflows. When internal reset is selected in watchdog timer mode, a low-
level signal is output from the RESO pin.
Bit 6
WT/IT IT IT IT
0
1
Bit 5—Timer Enable (TME): Selects whether TCNT runs or is halted.
Bit 5
TME
0
1
Rev. 4.00 Sep 27, 2006 page 412 of 1130
REJ09B0327-0400
* When OVF is polled and the interval timer interrupt is disabled, OVF = 1 must be read
at least twice.
Description
[Clearing conditions]
[Setting condition]
When TCNT overflows (changes from H'FF to H'00)
(When internal reset request generation is selected in watchdog timer mode, OVF is
cleared automatically by the internal reset.)
Description
Interval timer mode: Sends the CPU an interval timer interrupt request (WOVI) when
TCNT overflows
Watchdog timer mode: Generates a reset or NMI interrupt when TCNT overflows
At the same time, a low-level signal is output from the RESO pin (when internal reset
is selected)
Description
TCNT is initialized to H'00 and halted
TCNT counts
Write 0 in the TME bit
Read TCSR when OVF = 1 * , then write 0 in OVF
(Initial value)
(Initial value)
(Initial value)

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